On-Line Testing for VLSI

1: Introduction. - 1. 1. On-Line Testing for VLSIA Compendium of Approaches. - 2: Self-Checking Design. - 2. 1. On-Line Fault Monitoring. - 2. 2. Efficient Totally Self-Checking Shifter Design. - 2. 3. A New Design Method for Self-Checking Unidirectional Combinational Circuits. - 2. 4. Concurrent Delay Testing in Totally Self-Checking Systems. - 3: Self Checking Checkers. - 3. 1. Design of Self-Testing Checkers for m-out-of-n Codes Using Parallel Counters. - 3. 2. Self-Testing Embedded Two-Rail Checkers. - 4: On-Line Monitoring of Reliability Indicators. - 4. 1. Thermal Monitoring of Self-Checking Systems. - 4. 2. Integrated Temperature Sensors for On-Line Thermal Monitoring of Microelectronics Structures. - 4. 3. Clocked Dosimeter Compatible with Digital CMOS Technology. - 5: Built-In Self-Test. - 5. 1. Scalable Test Generators for High-Speed Datapath Circuits. - 5. 2. Mixed-Mode BIST Using Embedded Processors. - 5. 3. A BIST Scheme for Non-Volatile Memories. - 6: Fault Tolerant Systems. - 6. 1. On-Line Fault Resilience Through Gracefully Degradable ASICs. - 6. 2. Delivering Dependable Telecommunication Services Using Off-the-Shelf System Components. Language: English